Samsung S3C2451X User Manual page 405

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
AHB MASTER(DMA) OPERATION FLOW CHART
A. OUT Transfer Operation Flow
AHB Master IF Registers (Unit Counter, Total Transfer Counter,
Control) are set in initial state or Interrupt service routine.
AHB Master IF Registers are to be set after MCU reads all data packets
from USB OUT FIFO to operate a AHB Master operation after interrupt
service mode.
USB Core receives OUT data from HOST PC and transfers to Memory.
Master Interface transfers data from OUT FIFO in USB core to Memory
Total Transfer Counter in USB core is Zero?
AHB Master Operation is ended and Interrupt mode is On.
Figure 17-3. OUT Transfer Operation Flow
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
USB2.0 DEVICE
17-33

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