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S3C2451X RISC MICROPROCESSOR
PREVIEW STATUS REGISTER
Register
CIPRSTATUS
0x4D80_0098
CIPRSTATUS
OvFiCb_Pr
OvFiCr_Pr
Reserved
[29:28]
FrameCnt_Pr
[27:26]
Reserved
FlipMd_Pr
[24:23]
Reserved
ImgCptEn_
PrSC
Reserved
[20:0]
Address
R/W
R
Bit
[31]
Overflow state of preview FIFO Cb
[30]
Overflow state of preview FIFO Cr
Frame count of preview DMA
[25]
Flip mode of preview DMA
[22]
[21]
Image capture enable of preview path
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Preview path status
Description
CAMERA INTERFACE
Reset Value
0
Initial
Change
State
State
0
X
0
X
0
X
0
X
0
X
0
X
0
X
0
X
0
X
23-37
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