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PRODUCT OVERVIEW
Pin
Numbe
r
377
VSSA_ADC
378
VSSA_ADC
379
380
VDDA_ADC
NOTES:
1.
The @BUS REQ. shows the pin state at the external bus, which is used by the other bus master.
2.
' – ' mark indicates the unchanged pin state at Bus Request mode.
3.
Hi-z or Pre means Hi-z or early state and it is determined by the setting of MISCCR register.
4.
AI/AO means analog input/analog output.
5.
P, I, and O mean power, input and output respectively.
6.
The I/O state @nRESET shows the pin status in the @nRESET duration below.
nRESET
EXTCLK
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
1-26
Specifications and information herein are subject to change without notice.
Pin
Name
Function
VSS
VSSA_ADC
VSSA_ADC
VDDA_ADC
4 OSCin
@nRESET > 10 cycle
Default
I/O State
@Sleep
VSS
-
-
-
-
S3C2451X RISC MICROPROCESSOR
I/O State
@nRESET
P
P
P
P
I/O
Type
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