Samsung S3C2451X User Manual page 587

S3C2451X RISC MICROPROCESSOR
Window Palette control Register
Register
WPALCON 0x4C8000E4
WPALCON Bit
PALUPDATEEN
W1PAL [5:3]
W0PAL [2:0]
Address R/W
R/W Window Palette control register
[9] Palette memory access-right control bit.
Users should set this bit before access (write or read) palette
memory, in this case LCD controller cannot access palette. After
update, users should clear this bit for operation of palletized LCD.
0: Normal Mode (LCD controller access)
1: Enable (ARM access)
This bit determines the size of the palette data format of Window 1
000 = 25-bit ( A:8:8:8 )
001 = 24-bit (
010 = 19-bit ( A:6:6:6 )
011 = 18-bit ( A:6:6:5 )
100 = 18-bit (
101 = 16-bit ( A:5:5:5 )
110 = 16-bit (
This bit determines the size of the palette data format of Window 0
000 = 25-bit ( A:8:8:8 )
001 = 24-bit (
010 = 19-bit ( A:6:6:6 )
011 = 18-bit ( A:6:6:5 )
100 = 18-bit (
101 = 16-bit ( A:5:5:5 )
110 = 16-bit (
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
8:8:8 )
6:6:6 )
5:6:5 )
8:8:8 )
6:6:6 )
5:6:5 )
LCD CONTROLLER
Reset Value
0x0000_0000
Initial state
0
0
0
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