Samsung S3C2451X User Manual page 162

NAND FLASH CONTROLLER
AddrCycle
BusWidth
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
7-14
Specifications and information herein are subject to change without notice.
This bit can be changed by software later.
[1]
This bit indicates the number of Address cycle of NAND
Flash memory.
When Page Size is 512 Bytes,
0: 3 address cycle
When page size is 2K or 4K,
0: 4 address cycle
This bit is determined by OM[1] pin on reset and wake-up
time from sleep mode.
This bit can be changed by software later.
[0] This bit indicates the I/O bus width of NAND Flash Memory.
The value of BusWidth means the followings.
0: 8-bit bus
This bit has no meaning in NAND-boot by IROM, when the
I/O bus width is only 8-bit. BusWidth has effects on normal
access.. This bit should be 0
1: 4 address cycle
1: 5 address cycle
S3C2451X RISC MICROPROCESSOR
H/W Set
(CfgAddrCycle)
H/W Set
(CfgBusWidth)