Samsung S3C2451X User Manual page 466

Risc microprocessor
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HS_SPI CONTROLLER
Register
Packet_Count_reg(Ch0)
Packet_Count_reg(Ch1)
Packet_Count_reg
Packet_Count_En
Count Value
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
20-10
Specifications and information herein are subject to change without notice.
the HS_SPI channel.
Address
R/W
0x52000020
R/W Count how many data master gets
0x59000020
R/W Count how many data master gets
Bit
R/W
[16]
0: Disable
R/W
[15:0]
S3C2451X RISC MICROPROCESSOR
Description
Description
Enable bit for packet count
Packet count value
Reset Value
0x0
0x0
Initial State
1'b0
1:Enable
16'b0

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