Samsung S3C2451X User Manual page 750

ELECTRICAL DATA
Table 29-19. IIS Controller Module Signal Timing Constants(I2S Slave Mode Only)
(VDDi= 1.3V± 0.05V (400MHz), VDDi= TBD V± 0.05V (533MHz), TA = –40 to 85 °C, VDD_OP2 = 3.3V ± 0.3V)
Parameter
LR Clock Input Delay
Serial Data Setup Time
Serial Data Hold Time
(VDDi= 1.3V± 0.05V (400MHz), VDDi= TBD V± 0.05V (533MHz), TA = -40 to 85°C, VDD_OP2 = 3.3V ± 0.3V)
Parameter
SCL clock frequency
SCL high level pulse width
SCL low level pulse width
Bus free time between STOP and START
START hold time
SDA hold time
SDA setup time
STOP setup time
NOTES: Std. means Standard Mode and fast means Fast Mode.
1. The IIC data hold time(tSDAH) is minimum 0ns.
(IIC data hold time is minimum 0ns for standard/fast bus mode in IIC specification v2.1.)
Please check the data hold time of your IIC device if it's 0 nS or not.
2. The IIC controller supports only IIC bus device(standard/fast bus mode), not C bus device.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
29-26
Specifications and information herein are subject to change without notice.
Symbol
TLRId
TDS
TDH
Table 29-20. IIC BUS Controller Module Signal Timing
Min.
0
10
10
Symbol Min
f
–
SCL
t
std. 4.0
SCLHIGH
fast 0.6
t
std. 4.7
SCLLOW
fast 1.3
t std. 4.7
BUF
fast 1.3
t
std. 4.0
STARTS
fast 0.6
t
std. 0
SDAH
fast 0
t
std. 250
SDAS
fast 100
t
std. 4.0
STOPH
fast 0.6
S3C2451X RISC MICROPROCESSOR
Typ. Max
-
-
-
Typ. Max
– std. 100
fast 400
– –
– –
– –
– –
– std. - fast
0.9
– –
– –
Unit
ns
ns
ns
Unit
kHz
μs
μs
μs
μs
μs
ns
μs