Samsung S3C2451X User Manual page 238

Risc microprocessor
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INTERRUPT CONTROLLER
INTERRUPT MODE (INTMOD) REGISTER
This register is composed of 32 bits each of which is related to an interrupt source. If a specific bit is set to 1, the
corresponding interrupt is processed in the FIQ (fast interrupt) mode. Otherwise, it is processed in the IRQ mode
(normal interrupt).
Note that only one interrupt source can be serviced in the FIQ mode in the interrupt controller (you should use the
FIQ mode only for the urgent interrupt). Thus, only one bit of INTMOD can be set to 1.
Register
Address
INTMOD 1
0X4A000004
INTMOD 2
0X4A000044
NOTE: If an interrupt mode is set to FIQ mode in the INTMOD register, FIQ interrupt will not affect both INTPND and
INTOFFSET regi
INTMOD1
INT_ADC
INT_RTC
INT_SPI1
INT_UART0
INT_IIC0
INT_USBH
INT_USBD
INT_NAND
INT_UART1
INT_SPI0
INT_SDI0
INT_SDI1
INT_CFCON
INT_UART3
INT_DMA
INT_LCD
INT_UART2
INT_TIMER4
INT_TIMER3
INT_TIMER2
INT_TIMER1
INT_TIMER0
INT_WDT/AC97
INT_TICK
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
10-12
Specifications and information herein are subject to change without notice.
R/W
R/W
Interrupt mode regiseter for group 1.
0 = IRQ mode
R/W
Interrupt mode regiseter for group 2.
0 = IRQ mode
sters. In this case, the two registers are valid only for IRQ mode interrupt source.
Bit
[31]
0 = IRQ,
[30]
0 = IRQ,
[29]
0 = IRQ,
[28]
0 = IRQ,
[27]
0 = IRQ,
[26]
0 = IRQ,
[25]
0 = IRQ,
[24]
0 = IRQ,
[23]
0 = IRQ,
[22]
0 = IRQ,
[21]
0 = IRQ,
[20]
0 = IRQ,
[19]
0 = IRQ,
[18]
0 = IRQ,
[17]
0 = IRQ,
[16]
0 = IRQ,
[15]
0 = IRQ,
[14]
0 = IRQ,
[13]
0 = IRQ,
[12]
0 = IRQ,
[11]
0 = IRQ,
[10]
0 = IRQ,
[9]
0 = IRQ,
[8]
0 = IRQ,
S3C2451X RISC MICROPROCESSOR
Description
1 = FIQ mode
1 = FIQ mode
Description
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
1 = FIQ
Reset Value
0x00000000
0x00000000
Initial State
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

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