Samsung S3C2451X User Manual page 712

PCM AUDIO INTERFACE
PCM CONTROL REGISTER
The PCM_CTL register is used to control the various aspects of the PCM module. It also provides a status bit to
provide the option to using polling instead of interrupt based control.
Register
PCM_CTL0
PCM_CTL1
The bit definitions for the PCM_CTL Control Register are shown below:
PCM_CTLn
Reserved
TXFIFO_DIPSTICK
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
28-6
Specifications and information herein are subject to change without notice.
Address R/W
0x5C000000 R/W
0x5C000100 R/W
Bit
[31:19] Reserved
[18:13] Determines when the almost_full, almost_empty flags go active for
the TXFIFO
TXFIFO_ALMOST_EMPTY: txfifo_depth < txfifo_dipstick
TXFIFO_ALMOST_FULL:
NOTE:
- If txfifo_dipstick is 0, Almost_empty, Almost_full are invalid
- For DMA loading of TX fifo, Txfifo_dipstick should be equal to 2
or greater than 2(txfifo_dipstick >= 2)
This is required since the PCM_TXDMA uses
TXFIFO_ALMOST_FULL as the DMA request (keep
requesting data until the FIFO is almost full) In some
circumstances, the DMA write one more word after the
DMA_req goes away. Thus the almost_full flag most go
active with at least space for one extra word in the fifo
Description
Control the PCM0 Audio Inteface
Control the PCM1 Audio Inteface
Description
txfifo_depth > (32 – txfifo_dipstick)
S3C2451X RISC MICROPROCESSOR
Reset Value
0x00000000
0x00000000
Initial
State
0