Samsung S3C2451X User Manual page 456

2D
Field Bit
A_DR(max) [31:24]
R_DR(max) [23:16]
G_DR(max) [15:8]
B_DR(max) [7:0]
SOURCE IMAGE BASE ADDRESS REGISTER (SRC_BASE_ADDR_REG)
Register
SRC_BASE_ADDR 0x4D408730
_REG
Field Bit
ADDR [31:0]
DESTINATION IMAGE BASE ADDRESS REGISTER (DEST_BASE_ADDR_REG)
Register
DEST_BASE_ADD 0x4D408734
R_REG
Field Bit
ADDR [31:0]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
19-36
Alpha DR MAX value
RED DR MAX value
GREEN DR MAX value
BLUE DR MAX value
Image Base Address
Address R/W
R/W Source Image Base Address Register
Base address of the source image
Address R/W
R/W Destination Image Base Address Register
Base address of the destination image (in most cases, it is also the
frame buffer base address).
S3C2451X RISC MICROPROCESSOR
Description
Description
Description
Description
Description
Initial State
0xF
0xF
0xF
0xF
Reset Value
0x0
Initial State
0x0
Reset Value
0x0
Initial State
0x0