Samsung S3C2451X User Manual page 234

INTERRUPT CONTROLLER
INTERRUPT CONTROLLER SPECIAL REGISTERS
There are following control registers in the interrupt controller: source pending register, interrupt mode register,
mask register, priority register, interrupt pending register, interrupt offset register, sub-source pending register and
sub-mask register.
All the interrupt requests from the interrupt sources are first registered in the source pending register. They are
divided into two groups including Fast Interrupt Request (FIQ) and Interrupt Request (IRQ), based on the interrupt
mode register. The arbitration procedure for multiple IRQs is based on the priority register.
Overall Register Map
Register
SRCPND 1
INTMOD 1
INTMSK1
INTPND1
INTOFFSET1
SUBSRCPND
INTSUBMSK
PRIORITY_MODE1
PRIORITY_UPDAT
E1
SRCPND 2
INTMOD 2
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
10-8
Specifications and information herein are subject to change without notice.
Address R/W
0X4A000000 R/W Indicate the interrupt request status for group 1.
0 = The interrupt has not been requested.
1 = The interrupt source has asserted the interrupt
request.
0X4A000004 R/W Interrupt mode regiseter for group 1.
0 = IRQ mode
0X4A000008 R/W Determine which interrupt source of group 1is
masked. The masked interrupt source will not be
serviced.
0 = Interrupt service is available.
1 = Interrupt service is masked.
0X4A00000C
0X4A000010 R/W Indicate the interrupt request status for group 1.
0 = The interrupt has not been requested.
1 = The interrupt source has asserted the interrupt
request.
0X4A000014 R Indicate the IRQ interrupt request source for group
1
0X4A000018 R/W Indicate the interrupt request status.
0 = The interrupt has not been requested.
1 = The interrupt source has asserted the interrupt
request.
0X4A00001C R/W Determine which interrupt source is masked.
The masked interrupt source will not be serviced.
0 = Interrupt service is available.
1 = Interrupt service is masked.
0x4A000030 R/W IRQ priority mode register
0x4A000034 R/W IRQ priority update register
0X4A000040 R/W Indicate the interrupt request status for group 2..
0 = The interrupt has not been requested.
1 = The interrupt source has asserted the interrupt
request.
0X4A000044 R/W Interrupt mode regiseter for group 2.
S3C2451X RISC MICROPROCESSOR
Description
1 = FIQ mode
Reset Value
0x00000000
0x00000000
0xFFFFFFFF
0x00000000
0x00000000
0x00000000
0xFFFFFFFF
0x00000000
0x7F
0x00000000
0x00000000