Samsung S3C2451X User Manual page 364

UART
UART FIFO STATUS REGISTER
There are four UART FIFO status registers including UFSTAT0, UFSTAT1 UFSTAT2 and UFSTAT3 in the UART
block.
Register
UFSTAT0 0x50000018
UFSTAT1 0x50004018
UFSTAT2 0x50008018
UFSTAT3 0x5000C018
UFSTATn
Reserved
Tx FIFO Full
Tx FIFO Count [13:8]
Reserved
Rx FIFO Full
Rx FIFO Count
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
15-16
Specifications and information herein are subject to change without notice.
Address R/W
R UART channel 0 FIFO status register
R UART channel 1 FIFO status register
R UART channel 2 FIFO status register
R UART channel 3 FIFO status register
Bit
[15]
[14] Set to 1 automatically whenever transmit FIFO is full during
transmit operation
0 = 0-byte ≤ Tx FIFO data ≤ 63-byte
1 = Full
Number of data in Tx FIFO
[7] –
[6] Set to 1 automatically whenever receive FIFO is full during
receive operation
0 = 0-byte ≤ Rx FIFO data ≤ 63-byte
1 = Full
[5:0] Number of data in Rx FIFO
S3C2451 RISC MICROPROCESSOR
Description
Description
Reset Value
0x00
0x00
0x00
0x00
Initial State
0
0
0
0
0
0