Samsung S3C2451X User Manual page 451

S3C2451X RISC MICROPROCESSOR
RASTER OPERATION REGISTER (ROP_REG)
Register
ROP_REG 0x4D408410
Field Bit
Reserved [31:14]
OS [13]
ABM [12:10]
T [9]
B [8]
ROP Value [7:0]
ALPHA REGISTER (ALPHA_REG)
Register
ALPHA_REG 0x4D408420
Field Bit
Reserved [31:16]
Fading [15:8]
Alpha [7:0]
ROP & Alpha Setting
Address R/W
R/W Raster Operation Register
Third Operand Select :
1'b0 : Pattern
1'b1 : Foreground Color
Alpha Mode :
3'b000 : No Alpha Blending
3'b001 : Perpixel Alpha Blending with Source Bitmap
3'b010 : Alpha Blending with Alpha Register
3'b100 : Fading
Others : Reserved
Note that Perpixel Alpha Blending can only be applied on bit block
transfer.
0 : Opaque Mode
1 : Transparent Mode
0: Blue-screen Mode Disable
1: Blue-screen Mode Enable
Note that T and B must not be set at the same time.
Raster Operation Value
Address R/W
R/W Alpha Register
Fading Offset Value
Alpha Value
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
Description
Description
Description
2D
Reset Value
0x0
Initial State
0x0
0x0
0x0
0x0
0x0
0x0
Reset Value
0x0
Initial State
0x0
0x0
0x0
19-31