Samsung S3C2451X User Manual page 153

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
C. Byte Access
Register
NFDATA
7.9 STEPPINGSTONE (8KB IN 64KB SRAM)
The NAND Flash controller uses Steppingstone as the buffer on booting and also you can use this area for
various other purpose.
7.10 1bit / 4bit / 8BIT ECC (Error Correction Code)
NAND flash controller has four ECC (Error Correction Code) modules for 1 bit ECC , one for 4bit ECC and one for
8bit ECC.
The 1bit ECC modules for main data area can be used for (up to) 2048 bytes ECC parity code generation, and 1
bit ECC module for spare area can be used for (up to) 4 bytes ECC Parity code generation.
Both 4bit and 8bit ECC modules can be used for only 512 bytes ECC parity code generation.
4 bit and 8bit ECC modules generate the parity codes for each 512 byte. However, 1 bit ECC modules generate
parity code per byte lane separately.
7.10.1 ECC module features
ECC generation is controlled by the ECC Lock (MainECCLock, SpareECCLock) bit of the Control register. When
ECCLock is Low, ECC codes are generated by the H/W ECC modules.
1-BIT ECC Register Configuration
Following tables shows the configuration of 1-bit ECC value read from spare area of external NAND flash
memory. For comparing to ECC parity code generated by the H/W modules, each ECC data read from memory
must be written to NFMECCDn for main area and NFSECCD for spare area.
4-bit ECC decoding scheme is different to 1-bit ECC.
1. NAND Flash Memory Interface
Register
NFMECCD0
NFMECCD1
Register
NFSECCD
Bit [31:24]
Invalid value
Bit [31:24]
nd
Not used
2
th
Not used
4
Bit [31:24]
nd
Not used
2
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Bit [23:16]
Bit [15:8]
Invalid value
Invalid value
NOTE:
Bit [23:16]
ECC for I/O[7:0]
ECC for I/O[7:0]
Bit [23:16]
ECC for I/O[7:0]
NAND FLASH CONTROLLER
Bit [7:0]
st
1
I/O[ 7:0]
Bit [15:8]
st
Not used
1
rd
Not used
3
Bit [15:8]
st
Not used
1
Bit [7:0]
ECC for I/O[7:0]
ECC for I/O[7:0]
Bit [7:0]
ECC for I/O[7:0]
7-5

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