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S3C2451X RISC MICROPROCESSOR
SPECIAL FUNCTION REGISTER DESCRIPTIONS
SETTING SEQUENCE OF SPECIAL FUNCTION REGISTER
Special Function Register should be set as the following sequence. (nCS manual mode)
1. Set Transfer Type. ( CPOL & CPHA set )
2. Set Clock configuration register.
3. Set HS_SPI MODE configuration register.
4. Set HS_SPI INT_EN register.
5. Set Packet Count configuration register if necessary.
6. Set Tx or Rx Channel on.
7. Set nSSout low to start Tx or Rx operation.
A.
Set nSSout Bit to low, then start TX data writing.
B.
If auto chip selection bit is set, should not control nCS.
SPECIAL FUNCTION REGISTER
Register
CH_CFG(Ch0)
CH_CFG(Ch1)
CH_CFG
Reserved
[31:7]
High_speed_en
SW_RST
SLAVE
CPOL
CPHA
Address
R/W
0x52000000
R/W
0x59000000
R/W
Bit
-
R/W 0: low speed operation support at slave mode.
[6]
1: high speed operation support at slave mode.
R/W Software reset
[5]
0: inactive
R/W Whether HS_SPI Channel is Master or Slave.
[4]
0: Master
R/W Determine an active high or active low clock
[3]
0: active high
R/W Select one of the two fundamentally different transfer
[2]
format
0: format A
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
HS_SPI configuration register
HS_SPI configuration register
Description
1: active
1: Slave
1: active low
1: format B
HS_SPI CONTROLLER
Reset Value
0x0000_0040
0x0000_0040
Initial State
26'b0
1'b1
1'b0
1'b0
1'b0
1'b0
20-5
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