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S3C2451X RISC MICROPROCESSOR
SYSTEM CLOCK CONTROL
The ARMCLK is used for ARM926EJ core, the main CPU of S3C2451X. The HCLK is the reference clock for
internal AHB bus and peripherals such as the memory controller, the interrupt controller, LCD controller, the DMA,
USB host block, System Controller, Power down controller and etc. The PCLK is used for internal APB bus and
peripherals such as WDT, IIS, I2C, PWM timer, ADC, UART, GPIO, RTC and SPI etc. DDRCLK is the data strobe
clock for mDDR/DDR2 memories. CAMclk is used for camera interface block. HCLKCON and PCLKCON registers
are used for clock gating of HCLK, PCLK respectively. SCLKCON register is responsible for EPLLclk clock gating
on related modules.
Figure 2-8 shows MPLL Based clock domain.
Figure 2-7. The clock distribution block diagram
Figure 2-8. MPLL Based clock domain
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
SYSTEM CONTROLLER
2-9
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