Samsung S3C2451X User Manual page 748

ELECTRICAL DATA
(VDDi= 1.3V± 0.05V (400MHz), VDDi= TBD V± 0.05V (533MHz), TA = -40 to 85°C, VDD_SDRAM = 1.8V ± 0.1V,
133MHz, CL = 25pF)
Parameter
SDRAM Address Delay
SDRAM Chip Select Delay
SDRAM Row active Delay
SDRAM Column active Delay
SDRAM Byte Enable Delay
SDRAM Write enable Delay
SDRAM read Data Setup time
SDRAM read Data Hold time
SDRAM output Data Delay
SDRAM Clock Enable Delay
NOTE: If CL increase over the 25pF, operation conditions follow the guide table
Load Capacitance (CL)
25 pF < CL < 50 pF
50 pF < CL < 70 pF
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
29-24
Specifications and information herein are subject to change without notice.
Table 29-15. Memory Interface Timing Constants (SDRAM)
< 25 pF
Symbol
t
SAD
t
SCSD
t
SRD
t
SCD
t
SBED
t
SWD
t
SDS
t
SDH
t
SDD
t
CKED
Bus clock
133MHz
100MHz
90MHz
S3C2451X RISC MICROPROCESSOR
Min Max
1.58 5.61
1.98 5.27
1.88 4.67
1.63 3.96
1.80 4.58
2.13 5.51
1.50 -
1.50 -
1.59 5.65
1.62 4.11
Voltage
1.8V± 0.1V
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns