Samsung S3C2451X User Manual page 430

Risc microprocessor
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2D
The third operand can be pattern or foreground color, configurable by the OS bit in the ROP_REG.
Pattern is a user-specified 8x8x16-bpp image; the pattern data should be given in RGB565 format. The following
equation is used to calculate the pattern index of pixel (x, y):
index = ( ((patternOffsetY + y) & 0x7 )<<3 ) + ((patternOffsetX + x)&0x7),
where patternOffsetY and patternOffsetX are the offset value specified in register PATOFF_REG.
Here are some examples on how to use the ROP value to perform the operations:
1) Final Data = Source. Only the Source data matter, so ROP Value = "11110000".
2) Final Data = Destination. Only the Destination data matter, so ROP Value = "11001100".
3) Final Data = Pattern. Only the Pattern data matter, so ROP Value = "10101010".
4) Final Data = Source AND Destination. ROP Value = "11110000" & "11001100" = "11000000"
5) Final Data = Source OR Pattern. ROP Value = "11110000" | "10101010" = "11111010".
Note that the Raster Operation only applies on R, G, B fields of the color data; the A field will not be affected.
Related Registers
PATTERN_REG[0:31]
PATOFF_REG
ROP_REG
ALPHA BLENDING
Alpha Blending combines the source color and the destination color in the frame buffer to get the new destination
color.
The conventional alpha blending equation is: final data = src * alpha + dest * (1.0 – alpha). 2D uses 8-bit integer to
represent the alpha value, with 0 indicating 1/256 and 255 indicating 1.0. The equation of converting 8-bit ALPHA
value to the actual fractional alpha value is: alpha = (ALPHA+1) / 256.
The internal computation of alpha blending and fading is as follows:
User-specified alpha value: ALPHA (given by ALPHA_REG, from 0 to 255)
[Alpha Blending]
data = ( source * (ALPHA+1) + destination * (255-ALPHA) ) >> 8
[Fading]
data = (( source * (ALPHA+1) ) >> 8) + fading offset
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
19-10
1
0
1
1
1
1
Pattern data
Pattern offset X, Y
ROP configurations and ROP Value
S3C2451X RISC MICROPROCESSOR
1
Bit5
0
Bit6
1
Bit7

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