Samsung S3C2451X User Manual page 528

Risc microprocessor
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HSMMC CONTROLLER
CONTROL REGISTER 2
Register
CONTROL2_0
CONTROL2_1
Name
Bit
[31]
CDINVRXD3
[30]
CDINVRXD3
[29]
SELCARDOUT
[28]
FLTCLKSEL
[27:24] Filter Clock (iFLTCLK) Selection
LVLDAT
[23:16] DAT line level
ENFBCLKTX
[15]
ENFBCLKRX
[14]
SDCDSEL
[13]
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
21-60
Specifications and information herein are subject to change without notice.
Address
0X4AC00080
0X4A800080
Write Status Clear Async Mode Enable
This bit can make async-clear enable about Normal and Error interrupt
status bit. During the initialization procedure command operation, this bit
should be enabled.
'0' = Disable
'1' = Enable
Command Conflict Mask Enable
This bit can mask enable the Command Conflict Status (bit [1:0] of the
"ERROR INTERRUPT STATUS REGISTER")
0=Mask Disable, 1=Mask Enable
Card Detect signal inversion for RX_DAT[3]
0=Disable, 1=Enable
Card Removed Condition Selection
0= Card Removed condition is "Not Card Insert" State (When the transition
from "Card Inserted" state to "Debouncing" state)
1= Card Removed state is "Card Out" State (When the transition from
"Debouncing state to "No Card" state)
Filter Clock period = 2^(FltClkSel + 5) x iSDCLK period
0000 = 25 x iSDCLK, 0001 = 26 x iSDCLK ... 1111 = 220 x iSDCLK
Bit[23]=DAT[7], BIT[22]=DAT[6], BIT[21]=DAT[5], BIT[20]=DAT[4],
Bit[19]=DAT[3], BIT[18]=DAT[2], BIT[17]=DAT[1], BIT[16]=DAT[0]
(Read Only)
Feedback Clock Enable for Tx Data/Command Clock
'0'=Disable, '1'=Enable
Feedback Clock Enable for Rx Data/Command Clock
'0'=Disable, '1'=Enable
SD Card Detect Signal Selection
Card Detect Pin Level does not simply reflect SDCD# pin, but chooses from
SDCD, DAT[3], or CDTestlvl depending on CDSigSel and this field
(SDCDSel) values
'0'=nSDCD is used for SD Card Detect Signal
'1'=DAT[3] is used for SD Card Detect Signal
R/W
Description
R/W
Control register 2 (Channel 0)
R/W
Control register 2 (Channel 1)
Description
S3C2451X RISC MICROPROCESSOR
Reset Value
0x0
0x0
Initial
Value
0
0
0
0
0
Line
state
0
0
0

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