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I/O PORTS
I/O PORT CONTROL REGISTER
PORT A CONTROL REGISTERS (GPACON, GPADAT)
Register
GPACON
0x56000000
GPADAT
0x56000004
Reserved
0x56000008
Reserved
0x5600000c
GPACON
Reserved
GPA27
GPA26
GPA25
GPA24
GPA23
GPA22
GPA21
GPA20
GPA19
GPA18
GPA17
GPA16
GPA15
GPA14
GPA13
GPA12
GPA11
GPA10
GPA9
GPA8
GPA7
GPA6
GPA5
GPA4
GPA3
GPA2
GPA1
11-10
Address
R/W
R/W
R/W
-
-
Bit
[31:28]
Reserved
[27]
0 = Output
[26]
0 = Output
[25]
0 = Output
[24]
0 = Output
[23]
0 = Output
[22]
0 = Output
[21]
0 = Output
[20]
0 = Output
[19]
0 = Output
[18]
0 = Output
[17]
0 = Output
[16]
0 = Output
[15]
0 = Output
[14]
0 = Output
[13]
0 = Output
[12]
0 = Output
[11]
0 = Output
[10]
0 = RDATA_OEN
[9]
0 = Output
[8]
0 = Output
[7]
0 = Output
[6]
0 = Output
[5]
0 = Output
[4]
0 = Output
[3]
0 = Output
[2]
0 = Output
[1]
0 = Output
Description
Configures the pins of port A
The data register for port A
Description
1 = nWE_CF
1 = DQM3
1 = DQM2
1 = RSMAVD
1 = RSMCLK
1 = nFCE
1 = nRSTOUT
1 = nFRE
1 = nFWE
1 = ALE
1 = CLE
1 = nRCS[5]
1 = nRCS[4]
1 = nRCS[3]
1 = nRCS[2]
1 = nRCS[1]
1 = nOE_CF
1 = RADDR25
1 = RADDR24
1 = RADDR23
1 = RADDR22
1 = RADDR21
1 = RADDR20
1 = RADDR19
1 = RADDR18
1 = RADDR17
1 = RADDR16
S3C2451X RISC MICROPROCESSOR
-
-
Reset Value
0x0fffffff
0x0
-
-
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