Samsung S3C2451X User Manual page 416

IIC-BUS INTERFACE
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
18-10
Specifications and information herein are subject to change without notice.
START
Slave Rx mode has been
configured.
IIC detects start signal. and, IICDS
receives data.
IIC compares IICADD and IICDS (the
received slave address).
Matched?
Y
The IIC address match
interrupt is generated.
Read data from IICDS.
Clear pending bit to
resume.
Stop?
N
SDA is shifted to IICDS.
Interrupt is pending.
Figure 18-9. Operations for Slave/Receiver Mode
S3C2451X RISC MICROPROCESSOR
N
Y
END