Samsung S3C2451X User Manual page 335

Risc microprocessor
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S3C2451
RISC MICROPROCESSOR
14.3.2 Read/Write Register
Bit 0 of the RTCCON register must be set high in order to write the BCD register in RTC block. To display the
second, minute, hour, day, date, month, and year, the CPU must read the data in BCDSEC, BCDMIN,
BCDHOUR, BCDDATE, BCDDAY, BCDMON, and BCDYEAR registers respectively in the RTC block. However,
a one second deviation may exist because multiple registers are read. For example, when the user reads the
registers from BCDYEAR to BCDMIN, the result is assumed to be 2059 (Year), 12 (Month), 31 (Date), 23 (Hour)
and 59 (Minute). When the user read the BCDSEC register and the value ranges from 1 to 59 (Second), there is
no problem, but, if the value is 0 sec., the year, month, date, hour, and minute may be changed to 2060 (Year), 1
(Month), 1 (Date), 0 (Hour) and 0 (Minute) because of the one second deviation that was mentioned. In this case,
the user must re-read from BCDYEAR to BCDSEC if BCDSEC is zero.
14.3.3 Backup Battery Operation
The RTC logic can be driven by the backup battery, which supplies the power through the RTCVDD pin into the
RTC block, even if the system power is off. When the system is off, the interfaces of the CPU and RTC logic
must be blocked, and the backup battery only drives the oscillation circuit and the BCD counters to minimize
power dissipation.
14.3.4 Alarm Function
The RTC generates ALMINT(alarm interrupt) and ALMWKUP(alarm wake-up) at a specified time in the power-
down mode, power off mode or normal operation mode. In normal operation mode, If ALARM register value is a
same to BCD register, ALMINT is activated as well as the ALMWKUP. In the power-off and power-down, If
ALARM register value is a same to BCD register, ALMWKUP is activated. The RTC alarm register (RTCALM)
determines the alarm enable/disable status and the condition of the alarm time setting.
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Real Time Clock
14-3

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