Samsung S3C2451X User Manual page 613

S3C2451X RISC MICROPROCESSOR
CB2 START ADDRESS REGISTER
Register
CICOCBSA2 0x4D80_002C
CICOCBSA2 Bit
CICOCBSA2 [31:0]
CB3 START ADDRESS REGISTER
Register
CICOCBSA3 0x4D80_0030
CICOCBSA3 Bit
CICOCBSA3 [31:0]
CB4 START ADDRESS REGISTER
Register
CICOCBSA4 0x4D80_0034
CICOCBSA4 Bit
CICOCBSA4 [31:0]
CR1 START ADDRESS REGISTER
Register
CICOCRSA1 0x4D80_0038
CICOCRSA1 Bit
CICOCRSA1 [31:0]
Address R/W
RW
nd
Cb 2 frame start address for codec DMA
Address R/W
RW
rd
Cb 3 frame start address for codec DMA
Address R/W
RW
th
Cb 4 frame start address for codec DMA
Address R/W
RW
st
Cr 1 frame start address for codec DMA
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
Description
nd
Cb 2 frame start address for codec DMA
Description
Description
rd
Cb 3 frame start address for codec DMA
Description
Description
th
Cb 4 frame start address for codec DMA
Description
Description
st
Cr 1 frame start address for codec DMA
Description
CAMERA INTERFACE
Reset Value
0
Initial Change
State State
0 X
Reset Value
0
Initial Change
State State
0 X
Reset Value
0
Initial Change
State State
0 X
Reset Value
0
Initial Change
State State
0 X
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