Samsung S3C2451X User Manual page 533

Risc microprocessor
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S3C2451X RISC MICROPROCESSOR
FORCE EVENT REGISTER FOR AUTO CMD12 ERROR STATUS
Register
FEAER0
FEAER1
The Force Event Register is not a physically implemented register. Rather, it is an address at which the
Auto CMD12 Error Status Register can be written.
Writing 1 : set each bit of the Auto CMD12 Error Status Register
Writing 0 : no effect
D15 D12
Name
Bit
[15:8]
[7]
[6:5]
[4]
[3]
[2]
[1]
[0]
Address
0X4AC00050
0X4A800050
-
Force Event for Command Not Issued By Auto CMD12 Error
1=Interrupt is generated
0=No Interrupt
-
Force Event for Auto CMD12 Index Error
1=Interrupt is generated
0=No Interrupt
Force Event for Auto CMD12 End Bit Error
1=Interrupt is generated
0=No Interrupt
Force Event for Auto CMD12 CRC Error
1=Interrupt is generated
0=No Interrupt
Force Event for Auto CMD12 Timeout Error
1=Interrupt is generated
0=No Interrupt
Force Event for Auto CMD12 Not Executed
1=Interrupt is generated
0=No Interrupt
Preliminary product information describe products that are in development,
for which full characterization data and associated errata are not yet available.
Specifications and information herein are subject to change without notice.
R/W
WO
Force Event Auto CMD12 Error Interrupt
Register Error Interrupt (Channel 0)
WO
Force Event Auto CMD12 Error Interrupt
Register Error Interrupt (Channel 1)
Description
Description
HSMMC CONTROLLER
Reset Value
0x0000
0x0000
Initial Value
0x0
0
0
0
0
0
0
0
21-65

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