Siemens G130 List Manual page 463

Bit 12 can only be changed subject to the following prerequisites:
- preconditions, the same as bit 2 = 1
- p1810.3 = 0
For fast current changes, bit 15 = 1 together with p1802 = 0, 2 and p1803 > 106 % result in a significant increase in
the torque ripple. As a consequence, increasing the modulation limit must be checked on an application for
application basis.
Note: For bit 00 = 0:
Voltage limitation from the minimum of the DC link voltage (lower ripple in the output current, reduced output
voltage).
For bit 00 = 1:
Voltage limitation from averaged DC link voltage (higher output voltage with increased ripple in the output current).
The selection is only valid if the DC link compensation is not performed in the Control Unit (bit 1 = 0).
For bit 01 = 0:
DC link voltage compensation in the modulator.
For bit 01 = 1:
DC link voltage compensation in the current control.
For bit 02 = 0:
A gating unit that does not permit wobbulation is used.
Edge modulation is not possible for a parallel connection with a single-winding system (p7003 = 0).
Bit 02 cannot be set to 0 if bit 12 = 1.
For bit 02 = 1:
A gating unit that permits wobbulation is used.
For a wobbulation amplitude p1811 = 0, the maximum possible pulse frequency in p1800 = 2 x 1000 / p0115[0].
For a wobbulation amplitude p1811 > 0, the maximum possible pulse frequency in p1800 = 1000 / p0115[0].
If optimized pulse patterns has been activated (p1802 > 6), then a parameter save is required and switch off and
switch on again. This is displayed using a message (F01040).
For bit 03 = 1:
The actual current value sensing and the determination of the valve ON times takes place with a double current
controller clock cycle and phase offset.
The activation is only possible with r0192.23 = 1 and p1810.12 = 0 - and takes effect the next time the system is
powered up.
For bit 08 = 1:
Above the frequency threshold r1836[0], the pulse frequency is switched to the value in p1800. Below r1836[0]
(minus the hysteresis), the pulse frequency is reduced to the next possible pulse frequency (see r0114).
For bit 09 = 1:
Above the frequency threshold r1836[1], the pulse frequency is increased to the next possible value. Below r1836[1]
(minus the hysteresis), the pulse frequency is reduced to the next possible pulse frequency.
If bit 8 is set to 0, bit 9 is automatically reset.
For bit 10 = 0:
Pulse-locking function activated.
For bit 10 = 1:
Pulse-dropping function activated.
For bit 12 = 0:
The pulse frequency p1800 can also be synchronously set to the current controller clock cycle (see r0114).
Bit 12 can only be set from 1 to 0 if the pulse frequency p1800 is set synchronously to the current controller clock
cycle. In this case, the gating unit is not switched over.
For bit 12 = 1:
The pulse frequency p1800 can also be asynchronously set to the current controller clock cycle. In this case, the
effects should be observed (see p1800).
If bit 12 is set to 1, then the gating unit is automatically switched over (p1810.2 = 1). If this is not possible (see above),
then bit 12 cannot be set to 1.
Bit 12 cannot be set to 1, if p1810.3 = 1 is set.
For bit 15 = 1:
For p1802 = 0, 2 and p1803 > 106 %, dynamically, a modulation depth of more than 106 % is permitted. When p1803
is increased, the dynamic modulation depth reserve p1574 should be increased so that the maximum output voltage
r0071 approximately remains the same. For U/f control, the overcontrol in p1381 can be separately reduced.
SINAMICS G130/G150
List Manual (LH2), 07/2016, A5E03263479A
2 Parameters
2.2 List of parameters
463