Motorola PowerQUICC II MPC8280 Series Reference Manual page 228

Programming Model
0
Field
Reset
R/W
Addr
16
Field
Reset
R/W
Addr
Figure 4-36. Time Counter Register (TCMCNT)
4.3.2.16 Time Counter Alarm Register (TMCNTAL)
The time counter alarm register (TMCNTAL), shown in Figure 4-37, holds a value
(ALARM). When the value of TMCNT equals ALARM, a maskable interrupt is generated.
0
Field
Reset
R/W
Addr
16
Field
Reset
R/W
Addr
Figure 4-37. Time Counter Alarm Register (TMCNTAL)
Table 4-20 describes TMCNTAL fields.
Bits Name
0–31 ALARM The alarm interrupt is generated when ALARM field matches the corresponding TMCNT bits. The
resolution of the alarm is 1 second.
4-46
Freescale Semiconductor, Inc.
0000_0000_0000_0000
0000_0000_0000_0000
0000_0000_0000_0000
0000_0000_0000_0000
Table 4-20. TMCNTAL Field Descriptions
MPC8280 PowerQUICC II Family Reference Manual
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TMCNT
R/W
0x10224
TMCNT
R/W
0x10226
ALARM
R/W
0x1022C
ALARM
R/W
0x1222E
Description
15
31
15
31
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