Motorola PowerQUICC II MPC8280 Series Reference Manual page 328

PCI Interface
9.9 PCI Interface
The PCI bridge connects the processor and memory system to the I/O components via the
PCI system bus. This interface acts as both initiator (master) and target (slave) device. The
PCI bridge uses a 32-bit multiplexed, address/data bus that can run at frequencies up to 66
MHz. The interface provides address and data parity with error checking and reporting. The
interface provides for three physical address spaces—32-bit address memory, 32-bit
address I/O, and PCI configuration space.
The PCI bridge can function as either a host bridge or an agent device. Note that the PCI
bridge can be configured from the PCI bus while in agent mode. An address translation
mechanism is provided to map PCI memory windows between the host and agent.
The following are the major features supported by the PCI interface:
• PCI Specification Revision 2.2 compliant
• On-chip arbitration supports 3 external PCI bus masters (in addition to the PCI
bridge itself)
• Arbiter supports high-priority request and grant signal pairs
• Supports accesses to all PCI address spaces
• Supports PCI-to-60x-memory and 60x-memory-to-PCI streaming
• Memory prefetching of PCI read accesses and support for delayed read transactions
• Supports posting of processor to PCI and PCI to memory writes
• Supports selectable snoop
• PCI host bridge capabilities
• PCI agent mode capabilities which include the ability to configure from a remote
host
• Address translation units for address mapping between host and agent.
Efforts were made to keep the terminology in this chapter consistent with the PCI
Specification, revision 2.2, and other PCI documentation; therefore, the terms found in
Table 9-1 may differ from most documentation for processors that implement the PowerPC
architecture (for example, architecture specification or reference manuals).
Term
LSB/Lower order
MSB/High order
Byte
Word
Double word
Quad word
9-6
Freescale Semiconductor, Inc.
Table 9-1. PCI Terminology
Represents bit 0 or the bits closest to the LSB
Represents bit 31 or the bits closest to the MSB
Represents 8 bits of information
Represents 16 bits or 2 bytes
Represents 32 bits or 2 words or 4 bytes
Represents 64 bits or 2 double-words or 4 words or 8 bytes
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