Motorola PowerQUICC II MPC8280 Series Reference Manual page 276

Signal Descriptions
7.2.4 Address Transfer Attribute Signals
In internal only mode the address transfer attribute signals have no meaning.
The transfer attribute signals are a set of signals that further characterize the transfer—such
as the size of the transfer, whether it is a read or write operation, and whether it is a burst
or single-beat transfer. For a detailed description of how these signals interact, see
Section 7.2.4, "Address Transfer Attribute Signals."
7.2.4.1 Transfer Type (TT[0–4])
The transfer type signals (TT[0–4]) consist of five input/output signals on the MPC8280.
For a complete description of TT[0–4] signals and transfer type encoding, see
Section 8.4.3.1, "Transfer Type Signal (TT[0–4]) Encoding."
7.2.4.1.1 Transfer Type (TT[0–4])—Output
Following are the state meaning and timing comments for the TT[0–4] output signals on
the MPC8280.
State Meaning
Timing Comments Assertion/Negation—Same as A[0–31].
7.2.4.1.2 Transfer Type (TT[0–4])—Input
Following are the state meaning and timing comments for the TT[0–4] input signals on the
MPC8280.
State Meaning
Timing Comments Assertion/Negation—Same as A[0–31].
7.2.4.2 Transfer Size (TSIZ[0–3])
The transfer size (TSIZ[0–3]) signals consist of four input/output signals on the MPC8280,
following are the state meaning and timing comments for the TSIZ[0–3] signals on the
MPC8280.
State Meaning
Timing Comments Assertion/Negation—Same as A[0–31].
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Asserted/Negated—Specifies the type of transfer in progress.
High Impedance—Same as A[0–31].
Asserted/Negated—Specifies the type of transfer in progress for
snooping by the MPC8280.
Asserted/Negated—Specifies the data transfer size for the
transaction (see Section 8.4.3.3, "TBST and TSIZ[0–3] Signals and
Size of Transfer"). During graphics transfer operations, these signals
form part of the Resource ID (see TBST).
High Impedance—Same as A[0–31].
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