Motorola PowerQUICC II MPC8280 Series Reference Manual page 244

Reset Configuration
Table 5-7. Hard Reset Configuration Word Field Descriptions (continued)
Bits Name
1
24–25 CS10PC CS10 pin configuration. Defines the initial value of SIUMCR[CS10PC]. See Section 4.3.2.6, "SIU
Module Configuration Register (SIUMCR)."
Note: During the reset configuration sequence, the BCTL1/CS10 pin toggles like POE of the
60x bus GPCM, regardless of the configuration of the reset configuration word. After the reset
configuration sequence, the BCTL1/CS10 pin behaves according to the configuration of
SIUMCR[CS10PC].
26 ALD_EN CP auto load enable. Allows the CP to automatically load the essential PCI configuration
registers from the EEPROM during reset.
0 CP auto load is disabled.
1 CP auto load is enabled.
27 — Reserved, should be cleared.
28–31 MODCK_H High-order bits of the MODCK bus, which determine the clock reset configuration. See
Chapter 10, "Clocks and Power Control," for details.
Note: If the device is configured to PCI mode (PCI_MODE is driven low), this field has no effect
and the value for MODCK_H is loaded directly from the MODCK_H pins. Note that the value of
the MODCK_H bits are derived from the dedicated PCI_MODCK_H[0:3] pins when operating in
PCI mode.
1
The user should exercise caution when changing this bit. This bit has an immediate effect on the external bus and
may result in unstable system operation.
5.4.2 Hard Reset Configuration Examples
This section presents some examples of hard reset configurations in different systems.
5.4.2.1 Single MPC8280 with Default Configuration
This is the simplest configuration scenario. It can be used if the default values achieved by
clearing the hard reset configuration word are desired. This is applicable only for systems
using single-MPC8280 bus mode (as opposed to 60x bus mode). To enter this mode, tie
RSTCONF to V as shown in Figure 5-5. The MPC8280 does not access the boot
CC
EPROM; it is assumed that the default configuration is used upon exiting hard reset.
PORESET
Figure 5-5. Single Chip with Default Configuration
5-10
Freescale Semiconductor, Inc.
Vcc
HRESET
PORESET
MPC8280 PowerQUICC II Family Reference Manual
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Description
Configuration
Slave Chip
A[0–31]
D[0–31]
RSTCONF
Vcc
MOTOROLA