Hcan Monitor Register (Hcanmon) - Renesas H8SX/1500 Series Hardware Manual

13.3.20 HCAN Monitor Register (HCANMON)

HCANMON enables or disables an HCAN receive interrupt, controls transmission stop of the
HTxD pin, and reflects the states of the HCAN pins.
Bit 7
Bit Name —
Initial Value Undefined
R/W —
Bit Bit Name

7
6 TxSTP
5 HCANE

4 to 2
1 TxD
0 RxD
6 5
TxSTP HCANE
0 0 Undefined
R/W R/W
Initial
Value R/W

Undefined
0 R/W
0 R/W

Undefined
Undefined R
Undefined R
Section 13 Controller Area Network (HCAN)
4 3
— —
Undefined Undefined
— —
Description
Reserved
This bit is always read as undefined value and
cannot be modified.
HTxD Transmission Stop
Controls transmission stop of the HTxD pin.
0: Enables transmission from the HTxD pin
1: Fixes an output level of the HTxD pin at 1 and
transmission is stopped
HCAN Output Pin Enable
0: P64 is used as an I/O port
1: P64 is used as the HTxD pin.
Reserved
These bits are always read as undefined values
and cannot be modified.
Transmission pin
The state of the HTxD pin is read.
This bit cannot be modified.
Reception pin
The state of the HRxD pin is read.
This bit cannot be modified.
Rev. 3.00 Mar. 14, 2006 Page 483 of 804
2 1 0
— TxD RxD
Undefined Undefined
— R R
REJ09B0104-0300