Memory Map/Register Definition; Spi Status Register (Spix_S) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

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Memory map/register definition

35.4 Memory map/register definition
The SPI has 8-bit registers to select SPI options, to control baud rate, to report SPI status,
to hold an SPI data match value, and for transmit/receive data.
Absolute
address
(hex)
4007_6000
SPI Status Register (SPI0_S)
4007_6001
SPI Baud Rate Register (SPI0_BR)
4007_6002
SPI Control Register 2 (SPI0_C2)
4007_6003
SPI Control Register 1 (SPI0_C1)
4007_6004
SPI Match Register low (SPI0_ML)
4007_6005
SPI match register high (SPI0_MH)
4007_6006
SPI Data Register low (SPI0_DL)
4007_6007
SPI data register high (SPI0_DH)
4007_600A
SPI clear interrupt register (SPI0_CI)
4007_600B
SPI control register 3 (SPI0_C3)
4007_7000
SPI Status Register (SPI1_S)
4007_7001
SPI Baud Rate Register (SPI1_BR)
4007_7002
SPI Control Register 2 (SPI1_C2)
4007_7003
SPI Control Register 1 (SPI1_C1)
4007_7004
SPI Match Register low (SPI1_ML)
4007_7005
SPI match register high (SPI1_MH)
4007_7006
SPI Data Register low (SPI1_DL)
4007_7007
SPI data register high (SPI1_DH)
4007_700A
SPI clear interrupt register (SPI1_CI)
4007_700B
SPI control register 3 (SPI1_C3)

35.4.1 SPI Status Register (SPIx_S)

This register contains read-only status bits.
574
SPI memory map
Register name
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Width
Access
Reset value
(in bits)
8
R
20h
8
R/W
00h
8
R/W
00h
8
R/W
04h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R
20h
8
R/W
00h
8
R/W
00h
8
R/W
04h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R/W
00h
8
R/W
00h
Freescale Semiconductor, Inc.
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page
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