System Options Register 2 (Sim_Sopt2) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Memory map and register definition

12.3.3 System Options Register 2 (SIM_SOPT2)

SOPT2 contains the controls for selecting many of the module clock source options on
this device. See the Clock Distribution chapter for more information including clocking
diagrams and definitions of device clocks.
Address: 4004_7000h base + 1004h offset = 4004_8004h
Bit 31 30 29
0
R
W
Reset 0 0 0
Bit 15 14 13
R
W
Reset
0 0 0
Field
31–30 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
29–28 LPUART1 Clock Source Select
LPUART1SRC
Selects the clock source for the LPUART1 transmit and receive clock.
00 Clock disabled
01 IRC48M clock
10 OSCERCLK clock
11 MCGIRCLK clock
27–26 LPUART0 Clock Source Select
LPUART0SRC
Selects the clock source for the LPUART0 transmit and receive clock.
00 Clock disabled
01 IRC48M clock
10 OSCERCLK clock
11 MCGIRCLK clock
25–24 TPM Clock Source Select
TPMSRC
Selects the clock source for the TPM counter clock
148
28 27 26 25
TPMSRC
0 0 0 0
12 11 10 9
0
0 0 0 0
SIM_SOPT2 field descriptions
Table continues on the next page...
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
24 23 22 21
FLEXIOSRC
0 0 0 0
8 7 6 5
CLKOUTSEL
0 0 0 0
Description
20 19 18 17
0 0
0 0 0 0
4 3 2 1
0
0 0 0 0
Freescale Semiconductor, Inc.
16
0
0
0