System Modules; Clock Modules; Analog - NXP Semiconductors MKL27Z128VFM4 Reference Manual

10.5.2 System modules

Chip signal name Module signal
NMI
RESET
VDD
VSS
Chip signal name Module signal
LLWU_Pn

10.5.3 Clock modules

Chip signal name Module signal
EXTAL0
XTAL0

10.5.4 Analog

This table presents the signal descriptions of the ADC0 module.
Chip signal name Module signal
ADC0_DPn DADP3–DADP0
ADC0_DMn DADM3–DADM0
ADC0_SEn
VREFH
VREFL
Freescale Semiconductor, Inc.
Table 10-3. System signal descriptions
Description
name
— Non-maskable interrupt
NOTE: Driving the NMI signal low forces a non-maskable
interrupt, if the NMI function is selected on the
corresponding pin.
— Reset bidirectional signal
— MCU power
— MCU ground
Table 10-4. LLWU signal descriptions
Description
name
LLWU_Pn Wakeup inputs
Table 10-5. OSC signal descriptions
Description
name
EXTAL External clock/Oscillator input
XTAL Oscillator output
Table 10-6. ADC0 signal descriptions
Description
name
Differential Analog Channel Inputs
Differential Analog Channel Inputs
ADn Single-Ended Analog Channel Inputs
V Voltage Reference Select High
REFSH
V Voltage Reference Select Low
REFSL
Table continues on the next page...
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 10 Pinouts and Packaging
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