Modes Of Operation - NXP Semiconductors MKL27Z128VFM4 Reference Manual

• Idle receiver input
• Receiver data buffer overrun
• Noise error
• Framing error
• Parity error
• Active edge on receive pin
• Receiver framing error detection
• Hardware parity generation and checking
• 1/16 bit-time noise detection
• DMA interface

38.2.2 Modes of operation

The UART functions in the same way in all the normal modes.
It has the following low power mode:
• Stop mode
38.2.2.1 Run mode
This is the normal mode of operation.
38.2.2.2 Stop mode
The UART is inactive during Stop mode for reduced power consumption. The STOP
instruction does not affect the UART register states, but the UART module clock is
disabled. The UART operation resumes after an external interrupt brings the CPU out of
Stop mode. Bringing the CPU out of Stop mode by reset aborts any ongoing transmission
or reception and resets the UART. Entering or leaving Stop mode does not initiate any
power down or power up procedures for the ISO-7816 smartcard interface.
Freescale Semiconductor, Inc.
Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
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