Power Mode Control Register (Smc_Pmctrl) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

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VLPR, VLPW, and VLPS are not allowed.

VLPR, VLPW, and VLPS are allowed.

This field is reserved.

This read-only field is reserved and always has the value 0.

Allow Low-Leakage Stop Mode

Provided the appropriate control bits are set up in PMCTRL, this write-once field allows the MCU to enter

any low-leakage stop mode (LLS).

LLS is not allowed

LLS is allowed

This field is reserved.

This read-only field is reserved and always has the value 0.

Allow Very-Low-Leakage Stop Mode

Provided the appropriate control bits are set up in PMCTRL, this write once bit allows the MCU to enter

any very-low-leakage stop mode (VLLSx).

Any VLLSx mode is not allowed

Any VLLSx mode is allowed

This field is reserved.

This read-only field is reserved and always has the value 0.

14.4.2 Power Mode Control register (SMC_PMCTRL)

The PMCTRL register controls entry into low-power Run and Stop modes, provided that

the selected power mode is allowed via an appropriate setting of the protection

(PMPROT) register.

This register is reset on Chip POR not VLLS and by reset types

that trigger Chip POR not VLLS. It is unaffected by reset types

that do not trigger Chip POR not VLLS. See the Reset section

details for more information.

Address: 4007_E000h base + 1h offset = 4007_E001h

Freescale Semiconductor, Inc.

SMC_PMPROT field descriptions (continued)

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Chapter 14 System Mode Controller (SMC)