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29.4.1 Status and Control (TPMx_SC)
SC contains the overflow status flag and control bits used to configure the interrupt
enable, module configuration and prescaler factor. These controls relate to all channels
within this module.
Address: Base address + 0h offset
Bit
31
30
29
R
W
Reset
0
0
0
15
14
13
Bit
R
W
Reset
0
0
0
Field
31–9
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
8
DMA Enable
DMA
Enables DMA transfers for the overflow flag.
0
Disables DMA transfers.
1
Enables DMA transfers.
7
Timer Overflow Flag
TOF
Set by hardware when the TPM counter equals the value in the MOD register and increments. Writing a 1
to TOF clears it. Writing a 0 to TOF has no effect.
If another TPM overflow occurs between the flag setting and the flag clearing, the write operation has no
effect; therefore, TOF remains set indicating another overflow has occurred. In this case a TOF interrupt
request is not lost due to a delay in clearing the previous TOF.
Freescale Semiconductor, Inc.
28
27
26
25
0
0
0
0
12
11
10
9
0
0
0
0
0
TPMx_SC field descriptions
Table continues on the next page...
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 29 Timer/PWM Module (TPM)
24
23
22
21
0
0
0
0
0
8
7
6
5
DMA
TOIE
w1c
0
0
0
0
Description
20
19
18
17
0
0
0
0
4
3
2
1
CMOD
PS
0
0
0
0
16
0
0
0
463
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