Memories And Memory Interfaces; Clocks - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Module functional categories
Module
Miscellaneous control module (MCM)
Crossbar switch lite (AXBS-Lite)
Low-leakage wakeup unit (LLWU)
Peripheral bridge (AIPS-Lite)
DMA multiplexer (DMAMUX)
Direct memory access (DMA) controller
Computer operating properly watchdog
(WDOG)

2.2.3 Memories and memory interfaces

The following memories and memory interfaces are available on this device.
Module
Flash memory
Flash memory controller
SRAM
ROM

2.2.4 Clocks

The following clock modules are available on this device.
Module
Multipurpose Clock Generator Lite
(MCG-Lite)
System oscillator (OSC)
42
Table 2-3. System modules (continued)
The MCM includes integration logic and details.
The AXBS connects bus masters and bus slaves, allowing all bus masters to
access different bus slaves simultaneously and providing arbitration among the bus
masters when they access the same slave.
The LLWU module allows the device to wake from low leakage power modes (LLS
and VLLS) through various internal peripheral and external pin sources.
The peripheral bridge converts the crossbar switch interface to an interface to
access a majority of peripherals on the device.
The DMA multiplexer selects from many DMA requests down to 4 for the DMA
controller.
The DMA controller provides programmable channels with transfer control
descriptors for data movement via dual-address transfers for 8-, 16- and 32-bit
data values.
The WDOG monitors internal system operation and forces a reset in case of
failure. It can run from an independent 1 kHz low power oscillator, 8/2 MHz internal
oscillator or external crystal oscillator with a programmable refresh window to
detect deviations in program flow or system frequency.
Table 2-4. Memories and memory interfaces
Program flash memory — up to 256 KB of the non-volatile flash memory that can
execute program code.
Manages the interface between the device and the on-chip flash memory.
Up to 32 KB internal system RAM.
16 KB ROM.
Table 2-5. Clock modules
MCG Lite module containing a 48 MHz and an 8 or 2 MHz internal reference clock
source.
The system oscillator, in conjunction with an external crystal or resonator,
generates a reference clock for the MCU.
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Description
Description
Description
Freescale Semiconductor, Inc.