Mcg-Lite In Low-Power Mode; Hirc Usb Recovery - NXP Semiconductors MKL27Z128VFM4 Reference Manual

27.3.5 MCG-Lite in Low-power mode

In Stop/VLPS mode, MCG-Lite is inactive, HIRC is disabled, and LIRC is disabled
except that both MCG_C1[IREFSTEN] and MCG_C1[IRCLKEN] are set before entering
the Stop/VLPS mode.
In LLS/VLLS mode, MCG-Lite is power down.
In VLPR/VLPW mode, MCG-Lite is in Low-power mode, HIRC is disabled, while LIRC
can keep working.

27.3.6 HIRC USB recovery

This module allows the 48 MHz IRC to work with full-speed USB. IRC 48 MHz
accuracy is ±1.5% after factory trim. The USB module monitors the accuracy of the
nominal 48 MHz clock and adjusts the "Fine Trim" based on the default Fine Trim value
input, which is a starting IFR value.
This is capable only when USB is working in the full-speed
device mode. For low-speed device mode, software must
disable USB_CLK_RECOVERY and use the factory trim IRC
clk48 directly, because the factory trim IRC clk48 can meet the
low-speed device requirement.
Freescale Semiconductor, Inc.
NOTE
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Chapter 27 Multipurpose Clock Generator Lite (MCG_Lite)
441