Memory Map/Register Definitions; Cmp Control Register 0 (Cmpx_Cr0) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

24.3 Memory map/register definitions

Absolute
address
(hex)
4007_3000 CMP Control Register 0 (CMP0_CR0)
4007_3001 CMP Control Register 1 (CMP0_CR1)
4007_3002 CMP Filter Period Register (CMP0_FPR)
4007_3003 CMP Status and Control Register (CMP0_SCR)
4007_3004 DAC Control Register (CMP0_DACCR)
4007_3005 MUX Control Register (CMP0_MUXCR)

24.3.1 CMP Control Register 0 (CMPx_CR0)

Address: 4007_3000h base + 0h offset = 4007_3000h
Bit 7
Read 0
Write
Reset 0
Field
7 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
6–4 Filter Sample Count
FILTER_CNT
Represents the number of consecutive samples that must agree prior to the comparator ouput filter
accepting a new output state. For information regarding filter programming and latency, see the
description.
000 Filter is disabled. SE = 0, COUT = COUTA.
001 One sample must agree. The comparator output is simply sampled.
010 2 consecutive samples must agree.
011 3 consecutive samples must agree.
100 4 consecutive samples must agree.
101 5 consecutive samples must agree.
110 6 consecutive samples must agree.
111 7 consecutive samples must agree.
3 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
2 This field is reserved.
Reserved This read-only field is reserved and always has the value 0.
Freescale Semiconductor, Inc.
CMP memory map
Register name
6 5
FILTER_CNT
0 0
CMPx_CR0 field descriptions
Table continues on the next page...
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Width
Access
(in bits)
8 R/W
8 R/W
8 R/W
8 R/W
8 R/W
8 R/W
4 3
0
0 0
Description
Chapter 24 Comparator (CMP)
Section/
Reset value
page
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00h 24.3.2/398
00h 24.3.3/399
00h 24.3.4/400
00h 24.3.5/401
00h 24.3.6/401
2 1
0
HYSTCTR
0 0
Functional
0
0
397