Control Register (Usbx_Ctl) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Memory map/Register definitions

33.5.10 Control register (USBx_CTL)

Provides various control and configuration information for the USB module.

Address: 4007_2000h base + 94h offset = 4007_2094h

TXSUSPENDTOKENBUSY

USBx_CTL field descriptions

Live USB differential receiver JSTATE signal

The polarity of this signal is affected by the current state of LSEN .

Live USB Single Ended Zero signal

In Target mode, TXD_SUSPEND is set when the SIE has disabled packet transmission and

reception. Clearing this bit allows the SIE to continue token processing. This bit is set by the

SIE when a SETUP Token is received allowing software to dequeue any pending packet

transactions in the BDT before resuming token processing.

This field is reserved.

This read-only field is reserved and always has the value 0.

Setting this bit to 1 resets all the BDT ODD ping/pong fields to 0, which then specifies the

EVEN BDT bank.

Setting this bit enables the USB-FS to operate; clearing it disables the USB-FS. Setting the bit

causes the SIE to reset all of its ODD bits to the BDTs. Therefore, setting this bit resets much

of the logic in the SIE.

0 Disables the USB Module.

1 Enables the USB Module.

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

TXSUSPENDTOKENB

Freescale Semiconductor, Inc.