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Functional description
BRK13
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37.4.3 Receiver functional description
In this section, the receiver block diagram is a guide for the overall receiver functional
description. Next, the data sampling technique used to reconstruct receiver data is
described in more detail. Finally, different variations of the receiver wakeup function are
explained.
The receiver input is inverted by setting LPUART_STAT[RXINV]. The receiver is
enabled by setting the LPUART_CTRL[RE] bit. Character frames consist of a start bit of
logic 0, eight to ten data bits (msb or lsb first), and one or two stop bits of logic 1. For
information about 9-bit or 10-bit data mode, refer to
For the remainder of this discussion, assume the LPUART is configured for normal 8-bit
data mode.
After receiving the stop bit into the receive shifter, and provided the receive data register
is not already full, the data character is transferred to the receive data register and the
receive data register full (LPUART_STAT[RDRF]) status flag is set. If
LPUART_STAT[RDRF] was already set indicating the receive data register (buffer) was
already full, the overrun (OR) status flag is set and the new data is lost. Because the
LPUART receiver is double-buffered, the program has one full character time after
LPUART_STAT[RDRF] is set before the data in the receive data buffer must be read to
avoid a receiver overrun.
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Table 37-1. Break character length
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KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
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8-bit, 9-bit and 10-bit data
Break character
length
10 bit times
11 bit times
11 bit times
12 bit times
12 bit times
13 bit times
13 bit times
13 bit times
14 bit times
14 bit times
15 bit times
15 bit times
modes.
Freescale Semiconductor, Inc.
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