Uart Match Address Registers 1 (Uartx_Ma1) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

stores the data in a temporary register. If D register is
written first, and then the new data on data bus is stored in
D, the temporary value written by the last write to C3[T8]
gets stored in the C3[T8] register.
Address: 4006_C000h base + 7h offset = 4006_C007h
Bit 7
Read
Write
Reset
0
Field
RT Reads return the contents of the read-only receive data register and writes go to the write-only transmit
data register.

38.4.9 UART Match Address Registers 1 (UARTx_MA1)

The MA1 and MA2 registers are compared to input data addresses when the most
significant bit is set and the associated C4[MAEN] field is set. If a match occurs, the
following data is transferred to the data register. If a match fails, the following data is
discarded. These registers can be read and written at anytime.
Address: 4006_C000h base + 8h offset = 4006_C008h
Bit 7
Read
Write
Reset 0
Field
MA Match Address
Freescale Semiconductor, Inc.
Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)
6 5
0 0
UARTx_D field descriptions
6 5
0 0
UARTx_MA1 field descriptions
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
4 3
RT
0 0
Description
4 3
MA
0 0
Description
2 1
0 0
2 1
0 0
0
0
0
0
693