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Field
31–4
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
TSF
Timer Status Flags
The timer status flag sets depending on the timer mode, and can be cleared by writing logic one to the
flag.
In 8-bit counter mode, the timer status flag is set when the upper 8-bit counter equals zero and
decrements, this also causes the counter to reload with the value in the compare register.
In 8-bit PWM mode, the timer status flag is set when the upper 8-bit counter equals zero and decrements,
this also causes the counter to reload with the value in the compare register..
In 16-bit counter mode, the timer status flag is set when the 16-bit counter equals zero and decrements,
this also causes the counter to reload with the value in the compare register..
0
Timer Status Flag is clear
1
Timer Status Flag is set
39.3.7 Shifter Status Interrupt Enable (FLEXIO_SHIFTSIEN)
.
Address: 4005_F000h base + 20h offset = 4005_F020h
Bit
31
30
29
28
27
26
R
W
0
0
0
0
0
0
Reset
Field
31–4
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
SSIE
Shifter Status Interrupt Enable
Enables interrupt generation when corresponding SSF is set.
0
Shifter Status Flag interrupt disabled
1
Shifter Status Flag interrupt enabled
Freescale Semiconductor, Inc.
FLEXIO_TIMSTAT field descriptions
25
24
23
22
21
20
19
18
0
0
0
0
0
0
0
0
FLEXIO_SHIFTSIEN field descriptions
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Description
17
16
15
14
13
12
11
0
0
0
0
0
0
0
0
Description
Chapter 39 FlexIO
10
9
8
7
6
5
4
3
0
0
0
0
0
0
0
0
2
1
0
SSIE
0
0
0
755
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