Low Power Universal Asynchronous Receiver/Transmitter (Lpuart); Chip-Specific Lpuart Information; Lpuart0 And Lpuart1 Overview; Introduction - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Advertisement

Chapter 37
Low Power Universal asynchronous receiver/
transmitter (LPUART)

37.1 Chip-specific LPUART information

37.1.1 LPUART0 and LPUART1 overview

These modules supports basic UART with DMA interface function, x4 to x32
oversampling of baud-rate.
This module supports LIN slave operation.
The module can remain functional in VLPS mode provided the clock it is using remains
enabled.

37.2 Introduction

37.2.1 Features

Features of the LPUART module include:
• Full-duplex, standard non-return-to-zero (NRZ) format
• Programmable baud rates (13-bit modulo divider) with configurable oversampling
ratio from 4x to 32x
• Transmit and receive baud rate can operate asynchronous to the bus clock:
• Baud rate can be configured independently of the bus clock frequency
• Supports operation in Stop modes
• Interrupt, DMA or polled operation:
• Transmit data register empty and transmission complete
Freescale Semiconductor, Inc.
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
647

Advertisement

Table of Contents
loading

Table of Contents