Digital-To-Analog Converter; Dac Functional Description; Voltage Reference Source Select - NXP Semiconductors MKL27Z128VFM4 Reference Manual

When DMA support is enabled by setting SCR[DMAEN] and the interrupt is enabled by
setting SCR[IER], SCR[IEF], or both, the corresponding change on COUT forces a DMA
transfer request to wake up the system from STOP modes. After the data transfer has
finished, system will go back to STOP modes. Refer to DMA chapters in the device
reference manual for the asynchronous DMA function for details.

24.8 Digital-to-analog converter

The figure found here shows the block diagram of the DAC module.
It contains a 64-tap resistor ladder network and a 64-to-1 multiplexer, which selects an
output voltage from one of 64 distinct levels that outputs from DACO. It is controlled
through the DAC Control Register (DACCR). Its supply reference source can be selected
from two sources V
in1
in use. When in Disabled mode, DACO is connected to the analog ground.
VRSEL

24.9 DAC functional description

This section provides DAC functional description information.
Freescale Semiconductor, Inc.
and V . The module can be powered down or disabled when not
in2
V V
in1
in2
MUX
Vin
Figure 24-6. 6-bit DAC block diagram
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
VOSEL[5:0]
DACO
Chapter 24 Comparator (CMP)
DACEN
411