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shown; ADT = {AP7816a_T0[ADTI_H], AP7816a_T0[ADTI_L]}. This counter begins
to count on detection of the TS character which is detected when IS7816[INITD] flag is
set. Once the ATR process is completed, the ATD Counter must be disabled by writing 0
to AP7816x_T0 registers, in order to prevent the false occurrence of the ATD Duration
Time interrupt IS7816[ATD]. Note that this feature is only supported in T = 0 mode.
The ADT counter starts counting on detection of the complete
TS Character. It must be noted that by this time, exactly 10
ETUs have elapsed since the start bit of the TS character. The
user must take this into account while programming
AP7816a_T0 and AP7816b_T0 registers.
38.5.7.6 Baud rate generation
The value in WF7816[GTFD] does not impact the clock frequency. SBR and BRFD are
used to generate the clock frequency. This clock frequency is used by the UART only and
is not seen by the smartcard device. The transmitter clocks operates at 1/16 the frequency
of the receive clock so that the receiver is able to sample the received value 16 times
during the ETU.
38.5.7.7 UART restrictions in ISO-7816 operation
Due to the flexibility of the UART module, there are several features and interrupts that
are not supported while running in ISO-7816 mode. These restrictions are documented
within the register field definitions.
38.6 Reset
All registers reset to a particular value are indicated in
38.7 System level interrupt sources
There are several interrupt signals that are sent from the UART. The following table lists
the interrupt sources generated by the UART. The local enables for the UART interrupt
sources are described in this table. Details regarding the individual operation of each
interrupt are contained under various sub-sections of
Freescale Semiconductor, Inc.
Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)
NOTE
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Memory map and
Memory map and
registers.
registers.
735
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