Shifter Buffer N Bit Swapped Register (Flexio_Shiftbufbisn); Shifter Buffer N Byte Swapped Register (Flexio_Shiftbufbysn) - NXP Semiconductors MKL27Z128VFM4 Reference Manual

39.3.14 Shifter Buffer N Bit Swapped Register
(FLEXIO_SHIFTBUFBISn)
.
Address: 4005_F000h base + 280h offset + (4d × i), where i=0d to 3d
Bit 31 30 29 28 27 26
R
W
0 0 0 0 0 0
Reset
Field
SHIFTBUFBIS Shift Buffer
Alias to SHIFTBUF register, except reads/writes to this register are bit swapped. Reads return
SHIFTBUF[0:31].
39.3.15 Shifter Buffer N Byte Swapped Register
(FLEXIO_SHIFTBUFBYSn)
.
Address: 4005_F000h base + 300h offset + (4d × i), where i=0d to 3d
Bit 31 30 29 28 27 26
R
W
0 0 0 0 0 0
Reset
Field
SHIFTBUFBYS Shift Buffer
Alias to SHIFTBUF register, except reads/writes to this register are byte swapped. Reads return
{ SHIFTBUF[7:0], SHIFTBUF[15:8], SHIFTBUF[23:16], SHIFTBUF[31:24] }.
Freescale Semiconductor, Inc.
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
FLEXIO_SHIFTBUFBISn field descriptions
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
FLEXIO_SHIFTBUFBYSn field descriptions
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
17 16 15 14 13 12 11 10
SHIFTBUFBIS
0 0 0 0 0 0 0
Description
17 16 15 14 13 12 11 10
SHIFTBUFBYS
0 0 0 0 0 0 0
Description
Chapter 39 FlexIO
9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
9 8 7 6 5 4 3
0 0 0 0 0 0 0 0
2 1 0
0 0 0
2 1 0
0 0 0
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