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Chapter 14
System Mode Controller (SMC)
14.1 Chip-specific SMC information
This device does not support VLLS2 power mode. Ignore the VLLS2 in the following
sections.
14.2 Introduction
The System Mode Controller (SMC) is responsible for sequencing the system into and
out of all low-power Stop and Run modes.
Specifically, it monitors events to trigger transitions between power modes while
controlling the power, clocks, and memories of the system to achieve the power
consumption and functionality of that mode.
This chapter describes all the available low-power modes, the sequence followed to enter/
exit each mode, and the functionality available while in each of the modes.
The SMC is able to function during even the deepest low power modes.
See
AN4503: Power Management for Kinetis MCUs
SMC.
14.3 Modes of operation
The ARM CPU has three primary modes of operation:
• Run
• Sleep
• Deep Sleep
Freescale Semiconductor, Inc.
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
for further details on using the
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