Comparator (Cmp); Chip-Specific Cmp Information; Cmp Instantiation Information; Cmp Input Connections - NXP Semiconductors MKL27Z128VFM4 Reference Manual

Table of Contents

Comparator (CMP)

The device includes and two 8-input multiplexers for both the inverting and non-inverting

inputs of the comparator. Each CMP input channel connects to both muxes. Two of the

channels are connected to internal sources, leaving resources to support up to 6 input

pins. See the channel assignment table for a summary of CMP input connections for this

The CMP also includes one 6-bit DAC with a 64-tap resistor ladder network, which

provides a selectable voltage reference for applications where voltage reference is needed

for internal connection to the CMP.

The CMP can be optionally on in all modes except VLLS0.

The CMP has several module-to-module interconnects in order to facilitate ADC

triggering, TPM triggering, and interfaces. For complete details on the CMP module

interconnects, see the

Module-to-Module section.

The CMP does not support window compare function and a 0 must always be written to

CMP_CR1[WE]. The sample function has limited functionality since the SAMPLE input

to the block is not connected to a valid input. Usage of sample operation is limited to a

divided version of the bus clock (CMP_CR1[SE] = 0).

Due to the pin number limitation, the CMP pass through mode is not supported by this

device, so the CMPx_MUXCR[PSTM] must be left as 0.

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.