Bit Manipulation Engine; Peripheral Bridge (Aips-Lite) Memory Map - NXP Semiconductors MKL27Z128VFM4 Reference Manual

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Bit Manipulation Engine

4.6 Bit Manipulation Engine

The Bit Manipulation Engine (BME) provides hardware support for atomic read-modify-

write memory operations to the peripheral address space.

By combining the basic load and store instruction support in the Cortex-M instruction set

architecture with the concept of decorated storage provided by the BME, the resulting

implementation provides a robust and efficient read-modify-write capability to this class

of ultra low-end microcontrollers. See the

for a detailed description of BME functionality.

The peripheral memory map is accessible via one slave port on the crossbar in the

0x4000_0000–0x400F_FFFF region. The device implements one peripheral bridge that

defines a 1024 KB address space.

The three regions associated with this space are:

• A 128 KB region, partitioned as 32 spaces, each 4 KB in size and reserved for on-

platform peripheral devices. The AIPS controller generates unique module enables

for all 32 spaces.

• A 384 KB region, partitioned as 96 spaces, each 4 KB in size and reserved for off-

platform modules. The AIPS controller generates unique module enables for all 96

• The last slot is a 4 KB region beginning at 0x400F_F000 for accessing the GPIO

module. The GPIO slot (slot 128) is an alias of slot 15. This block is also directly

interfaced to the core and provides direct access without incurring wait states

associated with accesses via the AIPS controller.

Modules that are disabled via their clock gate control bits in the SIM registers disable the

associated AIPS slots. Access to any address within an unimplemented or disabled

peripheral bridge slot results in a transfer error termination.

For programming model accesses via the peripheral bridges, there is generally only a

small range within the 4 KB slots that is implemented. Accessing an address that is not

implemented in the peripheral results in a transfer error termination.

Bit Manipulation Engine Block Guide (BME)

KL27 Sub-Family Reference Manual , Rev. 5, 01/2016

Freescale Semiconductor, Inc.